APOORVA REDDY PRODDUTOORI. Optimal Low Power Deduction using Clock Gating. Journal of Technological Innovations, [S. l.], v. 1, n. 3, 2025. DOI: 10.93153/f0ed7106. Disponível em: https://jtipublishing.com/jti/article/view/82.. Acesso em: 18 jan. 2025.